Bibliography 6. Conclusions 5.3 Repeatability 5.2 Impact of Cache Size

Modern microprocessors tend to use on-chip caches that are much smaller than the working set size ofmany interesting computations. In such situations, cache performance can be improved through selectivecaching, use of cache replacement policies where data fetched from memory, although forwarded to theCPU, is not necessarily loaded into the cache. This paper introduces a selective caching policy calledProbabilistic Cache Replacement (PCR) in which caching of data fetched from main memory is deter-mined by a probabilistic boolean-valued function. Use of PCR creates a self-selection mechanism in whichrepeated misses to a word in memory increase its probability of being loaded into the cache. A PCR cachegives better reductions in instruction cache miss rate than a comparable cache configuration with a victim-cache. Instruction cache miss rates can be reduced by up to 30% for some of the SPECmarks, although theoptimal probability distribution is workload dependent. This paper also presents a mechanism called Feed-back PCR which dynamically selects probability values for a PCR cache. For an 16 K byte direct-mappedinstruction cache, Feedback PCR with a one-entry MFB gives an average reduction in cache misses ofover 11% across the SPECmarks with no significant increase in cache misses for any of the workloads, andcompares favorably with other alternatives of similar hardware cost.